Typical RF power transistors incorporate an inductive shunt output impedance matching network having a distinctive gain signature which is a function of the series and parallel resonances of the output match network. The output match network typically includes a blocking capacitor for blocking DC. The characteristics of the capacitor in concert with circuit inductances, creates a low frequency resonance which causes a high gain area in the response of the device at low frequencies e.g. between 1 to 300 MHz. The high gain area is undesired and may cause problems with the harmonic content of DPD systems, or worse, negative consequences arising from high peak drain voltages appearing as a result of gain peak coincident, heterodyne frequencies generated by multiplying signals using a nonlinear component such as a power transistor. The output of such a nonlinear operation yields sinusoidal terms with frequencies at the sum and difference of the original signal frequencies, plus the original frequencies and at multiples of the original frequencies which are commonly referred to as harmonics.
The amplitude at the power amplifier drain is higher than the observed gain at the output of the match network because blocking capacitors provided outside the device attenuate the gain peak to some degree. However, the low frequency gain peak can cause the peak drain voltage of the power transistor to surpass the breakdown voltage of the device under certain conditions. For example, any unintended system artifacts appearing in the region of the low frequency gain peak are strongly amplified and impact performance and/or cause device overstress. In another example, broadband signals may have a baseband component coincident with the low frequency gain peak which can impact performance and/or cause device overstress when amplified due to the low frequency gain peak. Any sharp change in gain at low frequencies can limit video bandwidth, and adversely affect the ability of a power device to function properly with a digital predistortion system.
The power device is overstressed when the peak drain voltage exceeds the breakdown voltage of the device. If the un-desired low frequency gain peak is suppressed, this peak voltage can be lowered. Other methodologies are: Low frequency input trap circuits which are not very effective at mitigating low frequency gain peaks in the frequency response of a typical output match network. Low frequency input trap circuits can also cause instabilities or limit video bandwidth. The value of the blocking capacitor included in the output match network can be increased, moving the gain peak into a lower frequency region. However, doing so has a very negative impact on video bandwidth. This methodology also has little or no effect on peak voltages at the device drain. On-chip feedback can be provided to mitigate an undesirable low frequency gain peak, but at the risk of introducing instabilities. On-chip feedback circuits are also difficult to implement without sacrificing performance.